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| HCC/HCF4536B PROGRAMMABLE TIMER .24FLI .LAST16STAGESSELECTABLEBYBCDSE.BYPASSI .ON.CLOCKI .SCHMI .ON.TYPI .TEST .SETANDRESETI .CAPABLE P-FLOP STAGES - COUNTS FROM 20 TO 224 .STANDARDI .QUI .5V,10V,AND15VPARAMETRI .I .100%TESTEDFORQUI .MEETSALLREQUI DESCRIPTION LECT CODE NPUT ALLOWS BYPASSING FIRST 8 STAGES CHIP RC OSCILLATOR PROVISION NHIBIT INPUT TT-TRIGGER IN CLOCK LINE PERMITS OPERATION WITH VERY LONG RISE AND FALL TIMES CHIP MONOSTABLE OUTPUT PROVISION CAL fCL = 3MHz AT VDD = 10V MODE ALLOWS FAST TEST SEQUENCE NPUTS OF DRIVING TWO LOW POWER TTL LOADS, ONE LOWER-POWER SCHOTTKY LOAD, OR TWO HTL LOADS OVER THE RATED TEMPERATURE RANGE ZED, SYMMETRICAL OUTPUT CHARACTERISTICS ESCENT CURRENT AT 20V FOR HCC DEVICE C RATINGS NPUT CURRENT OF 100 nA AT 18V AND 25C FOR HCC DEVICE ESCENT CURRENT REMENTS OF JEDEC TENo TATIVE STANDARD N . 13A, "STANDARD SPECIFICATIONS FOR DESCRIPTION OF "B" SERIES CMOS DEVICES" EY (Plastic Package) F (Ceramic Package) C1 (Chip Carrier) HCC4536BF ORDER CODES : HCF4536BEY HCF4536BC1 PIN CONNECTIONS The HCC4536B (extended temperature range) and HCF4536B (intermediate temperature range) are monolithic integrated circuits, available in 16-lead dual in-line plastic or ceramic package. The HCC/HCF4536B is a programmable timer consisting of 24 ripple-binary counter stages. The salient feature of this device is its flexibility. The device can count from 1 to 224 or the first 8 stages can be bypassed to allow an output, selectable by a 4-bit code, from any one of the remaining 16 stages. It can be driven by an external clock or an RC oscillator that can be constructed using on-chip components. November 1996 1/17 HCC/HCF4536B Input IN1 serves as either the external clock input or the input to the on-chip RC oscillator. OUT1 and OUT2 are connection terminals for the external RC components. In addition, an on-chip monostable circuit is provided to allow a variable pulse width output. Various timing functions can be achieved using combinations of these capabilities. A logic 1 on the 8-BYPASS input enables a bypass of the first 8 stages and makes stage 9 the first counter stage of the last 16 stages. Selection of 1 of 16 outputs is accomplished by the decoder and the BCD inputs A, B, C FUNCTIONAL DIAGRAM and D. MONO IN is the timing input for the on-chip monostable oscillator. Grounding of the MONO IN terminal through a resistor of 10K or higher, disables the one-shot circuit and connects the decoder directly to the DECODE OUT terminal. A resistor to VDD and a capacitor to ground from the MONO IN terminal enables the one-shot circuit and controls its pulse width. A fast test mode is enabled by a logic 1 on 8-BYPASS, SET, and RESET. This mode divides the 24-stage counter into three 8-stage sections to facilitate a fast test sequence. ABSOLUTE MAXIMUM RATINGS Symbol V DD* Vi II Pt ot Parameter Supply Voltage : H CC Types H C F Types Input Voltage DC Input Current (any one input) Total Power Dissipation (per package) Dissipation per Output Transistor for T o p = Full Package-temperature Range Operating Temperature : H CC Types H C F Types Storage Temperature Value - 0.5 to + 20 - 0.5 to + 18 - 0.5 to V DD + 0.5 10 200 100 - 55 to + 125 - 40 to + 85 - 65 to + 150 Unit V V V mA mW mW C C C Top Tstg Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for external periods may affect device reliability. * All voltages are with respect to VSS (GND). 2/17 HCC/HCF4536B BLOCK DIAGRAM TRUTH TABLE In 1 Set Reset Clock Osc Out1 Out2 Decode Inh Inh Out - -/ -\ - X X X 0 1 0 0 1 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 X - -/ 0 -\ - 1 - -/ -\ - 0 0 -\ - No Change DECODE OUT SELECTION TABLE D 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 C 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 B 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 A 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 Number or Stages I n Divider Chain 8-BYPASS = 0 8-BYPASS = 1 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 - Advance to Next -/ State 1 1 1 0 No Change No Change - Advance to Next -/ State 0 = Low Level 0 = Low Level 3/17 HCC/HCF4536B LOGIC DIAGRAMS (continued on next page) 4/17 HCC/HCF4536B LOGIC DIAGRAMS (continued) 5/17 HCC/HCF4536B STATIC ELECTRICAL CHARACTERISTICS (over recommended operating conditions) Test Conditions Symbol Parameter VI (V) 0/ 5 HCC Types 0/15 0/20 0/ 5 HCF 0/10 Types 0/15 V OH Output High Voltage 0/ 5 0/10 0/15 V OL Output Low Voltage 5/0 10/0 15/0 V IH Input High Voltage 0.5/4.5 1/9 4.5/0.5 9/1 0/ 5 HCC Types 0/10 0/15 0/ 5 0/ 5 HCF Types 0/10 0/15 I OL Output Sink Current 0/ 5 HCC 0/10 Types 0/15 0/ 5 HCF 0/10 Types 0/15 I IH , I IL Input Leakage Current HCC 0/18 Types HCF 0/15 Types Any Input 0/ 5 2.5 4.6 9.5 13.5 2.5 4.6 9.5 13.5 0.4 0.5 1.5 0.4 0.5 1.5 <1 <1 <1 <1 <1 <1 <1 <1 <1 <1 0/10 VO (V) Value Unit |I O | V D D T L o w* 25 C T Hi g h * (A) (V) Min. Max. Min. Typ. Max. Min. Max. 5 10 15 20 5 10 15 5 10 15 5 10 15 5 10 15 5 10 15 5 5 10 15 5 5 10 15 5 10 15 5 10 15 18 Any Input 15 0.3 10 5 -5 IL Quiescent Current 5 10 20 100 20 40 80 4.95 9.95 14.95 0.05 0.05 0.05 3.5 7 11 1.5 3 4 -2 - 0.64 - 1.6 - 4.2 - 1.53 - 0.52 - 1.3 - 3.6 0.64 1.6 4.2 0.52 1.3 3.6 0.1 3.5 7 11 4.95 9.95 14.95 0.04 0.04 0.04 0.08 0.04 0.04 0.04 5 10 20 100 20 40 80 4.95 9.95 14.95 0.05 0.05 0.05 3.5 7 11 1.5 3 4 150 300 600 3000 150 300 600 V 0.05 0.05 0.05 V 1.5 3 4 - 1.15 - 0.36 - 0.9 - 2.4 - 1.1 - 0.36 - 0.9 - 2.4 0.36 0.9 2.4 0.36 0.9 2.4 1 A 1 pF mA mA V V A 1.5/13.5 < 1 V IL Input Low Voltage 13.5/1.5 < 1 I OH Output Drive Current - 1.6 - 3.2 - 0.51 - 1 - 1.3 - 2.6 - 3.4 - 6.8 - 1.36 - 3.2 - 0.44 - 1 - 1.1 - 2.6 - 3.0 - 6.8 0.51 1.3 3.4 0.44 1.1 3.0 1 2.6 6.8 1 2.6 6.8 10 - 5 0.1 0.3 7.5 CI Input Capacitance * TLow = - 55C for HCC device : - 40C for HCF device. * THigh= + 125C for HCC device : + 85C for HCF device. The Noise Margin for both "1" and "0" level is : 1V min. with VDD = 5V , 2V min. with VDD = 10V, 2.5 V min. with VDD = 15V. 6/17 HCC/HCF4536B DYNAMIC ELECTRICAL CHARACTERISTICS (Tamb = 25 o C, C L = 50 pF, RL = 200 K, o typical temperature coefficent for all VDD values is 03 %/ C, all input rise and fall times= 20 ns) Symbol tPLH tPHL Parameter Propagation Delay Time Clock to Q1, 8-bypass High Clock to Q1, 8-bypass Low Test Conditions VDD (V) 5 10 15 5 10 15 5 10 15 5 10 15 5 10 15 5 10 15 5 10 15 5 10 15 5 10 15 5 10 15 5 10 15 5 10 15 5 10 15 10 15 Min. Value Typ. 1 0.5 0.35 2.5 0.8 0.6 4 1.5 1 150 75 50 300 125 80 3 1 0.75 100 50 40 200 75 50 200 100 60 3 1 0.75 2.5 1 0.6 3.5 1.5 1 Unlimted 0.5 1.5 2.5 1 3 5 Max. 2 1 0.7 5 1.6 1.2 8 3 2 300 150 100 600 250 160 6 2 1.5 200 100 80 400 150 100 400 200 120 6 2 1.5 5 2 1.6 7 3 2 Unit s s Clock to Q16 s Qn to Qn + 1 ns tPLH Propagation Delay Time ns tPHL Reset to Qn s tTLH tTHL tW Transition Time ns Pulse Width Clock Set ns ns Reset s Recovery Time Set Reset s s tr, tf Clock Input Rise or Fall Time s fCL Maximum Clock Input Frequency MHz 7/17 HCC/HCF4536B Output Low (sink) Current Characteristics. Output High (source) Current Characteristics. Typical Transition Time vs. Load Capacitance. Typical Propagation Delay Time vs. Load Capacitance (clock to Q1, 8 Bypass high). Typical Propagation Delay Time vs. Load Capacitance (Clock to Q1, 8 Bypass low). Typical Propagation Delay Time vs. Load Capacitance (Clock to Q16, 8 Bypass high). 8/17 HCC/HCF4536B Typical Propagation Delay Time vs. Load Capacitance (QN to QN+1). Typical RC Oscillator Frequency Deviation vs. Supply Voltage. Typical RC Oscillator Frequency Deviation vs. Time Constant Resistance and Capacitance. Typical RC Oscillator Frequency Deviation vs. Ambient Temperature (RS = 0). Typical RC Oscillator Frequency Deviation vs. Ambient Temperature (RS = 120K). Typical Pulse Width vs. External Capacitance (VDD = 5V). 9/17 HCC/HCF4536B Typical Pulse Width vs. External Capacitance (VDD = 10V). Typical Pulse Width vs. External (VDD = 15V). Capacitance Typical Dynamic Power Dissipation vs. Input Pulse Frequency. TYPICAL APPLICATIONS Time Internal Configuration Using External Clock ; Set and Clock Inhibit Functions. Time Internal Configuration Using External Clock ; Reset and Output Monostable to Achieve a Pulse Output. 10/17 HCC/HCF4536B TYPICAL APPLICATIONS (Continued) Time Internal Configuration Using Onchip RC Oscillator and Reset Input to Initiate Time Interval. Application Showing Use of 4098B and 4536B to get Decode Pulse 8 Clock Pulses after Reset TIMING DIAGRAM 11/17 HCC/HCF4536B Functional Test Sequence Inputs I n1 1 1 0 1 0 - - 0 0 Set 0 1 1 1 Reset 1 1 1 1 8-Bypass 1 1 1 1 Outputs Decade Out Q 1 Thru Q 2 4 0 0 0 Counter is in three 8-stage section in parallel mode. First "1" to "0" Transition of Clock 255 "1" to "0" transitions are clocked in the counter. 1 1 The 255 "1" to "0" Transition Counter converted back to 24 stages in series mode. Set and Reset must be connected together and simultaneoulsy go from "1" to "0". In 1 switches to a "1". Counter Ripples from an all "1" state to an all "0" state. Comments All 2 4 steps a r e in reset mode. 1 0 1 0 1 0 1 0 0 0 0 0 0 0 1 0 FUNCTIONAL TEST SEQUENCE Test Function has been included for the reduction of test time required to exercise all 24 counter stages. This test function divides the counter into three 8stage section and 255 counts are loaded in each of the 8-stage sections in parallel. All flip-flops are now TEST CIRCUITS Quiescent Device Current. Input Voltage. at a "1". The counter is now returned to the normal 24-steps in series configuration. One more pulse is entered into In1 which will cause the counter to ripple from an all "1" state to an all "0" state. 12/17 HCC/HCF4536B TEST CIRCUITS (continued) Input Leakage Current. Dynamic Power Dissipation. Switching Time. Input Waveforms for Switching-Time. Functional. 13/17 HCC/HCF4536B Plastic DIP16 (0.25) MECHANICAL DATA mm MIN. a1 B b b1 D E e e3 F I L Z 3.3 1.27 8.5 2.54 17.78 7.1 5.1 0.130 0.050 0.51 0.77 0.5 0.25 20 0.335 0.100 0.700 0.280 0.201 1.65 TYP. MAX. MIN. 0.020 0.030 0.020 0.010 0.787 0.065 inch TYP. MAX. DIM. P001C 14/17 HCC/HCF4536B Ceramic DIP16/1 MECHANICAL DATA mm MIN. A B D E e3 F G H L M N P Q 7.8 2.29 0.4 1.17 0.22 0.51 0.38 17.78 2.79 0.55 1.52 0.31 1.27 10.3 8.05 5.08 0.307 0.090 0.016 0.046 0.009 0.020 3.3 0.015 0.700 0.110 0.022 0.060 0.012 0.050 0.406 0.317 0.200 TYP. MAX. 20 7 0.130 MIN. inch TYP. MAX. 0.787 0.276 DIM. P053D 15/17 HCC/HCF4536B PLCC20 MECHANICAL DATA mm MIN. A B D d1 d2 E e e3 F G M M1 1.27 1.14 7.37 1.27 5.08 0.38 0.101 0.050 0.045 9.78 8.89 4.2 2.54 0.56 8.38 0.290 0.050 0.200 0.015 0.004 TYP. MAX. 10.03 9.04 4.57 MIN. 0.385 0.350 0.165 0.100 0.022 0.330 inch TYP. MAX. 0.395 0.356 0.180 DIM. P027A 16/17 HCC/HCF4536B Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsability for the consequ ences of use of such information nor for any infringement of patents or other rights of third parties which may results from its use. No license is granted by implication or otherwise under any patent or patent rights of SGS-THOMSON Microelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. SGS-THOMSON Microelectronics products are not authorized for use as critical compone in life support devices or systems without express nts written approval of SGS-THOMSON Microelectonics. (c) 1996 SGS-THOMSON Microelectronics - Printed in Italy - All Rights Reserved SGS-THOMSON Microelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - France - Germany - Hong Kong - Italy - Japan - Korea - Malaysia - Malta - Morocco - The Netherlands Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A . 17/17 |
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